fixate on what you think you know… you’re missing what you don’t though.

  • 1 Post
  • 24 Comments
Joined 3 years ago
cake
Cake day: May 7th, 2023

help-circle
  • agreed. too many americans seem oblivious to the deep generational rage that america has earned from the globe with its corporate mob protectionism.

    As perfectly stated by American Major General Smedley Butler

    War Is A Racket

    I spent 33 years and four months in active military service and during that period I spent most of my time as a high class muscle man for Big Business, for Wall Street and the bankers. In short, I was a racketeer, a gangster for capitalism. I helped make Mexico and especially Tampico safe for American oil interests in 1914. I helped make Haiti and Cuba a decent place for the National City Bank boys to collect revenues in. I helped in the raping of half a dozen Central American republics for the benefit of Wall Street. I helped purify Nicaragua for the International Banking House of Brown Brothers in 1902-1912. I brought light to the Dominican Republic for the American sugar interests in 1916. I helped make Honduras right for the American fruit companies in 1903. In China in 1927 I helped see to it that Standard Oil went on its way unmolested. Looking back on it, I might have given Al Capone a few hints. The best he could do was to operate his racket in three districts. I operated on three continents.

    stupidity, incompetence, greed and avarice… perhaps not the ideal way for the US to end its global colonialism, but its sure as fuck not an unexpected way.

    best of luck to all my fellow human people out there in the world, always.







  • perhaps “home insecure” is a better term. this market may turn many “home owners” into home renters.

    those with unserviceable mortgages will lose them, increasing supply and putting further downward pressure on pricing right after a countrywide housing price bubble. these people are going to be massively underwater on their debt. there may be some people with the means to buy in a down market, but I think many homes will be snapped up at auction by corps for rental.

    I am not sure how any of this results in an increase in wealth for average people. its likely going to end up as another massive wealth transfer upwards.











  • ok. my apologizes.

    there really are tons of things to consider with that question. RISC has historically allowed for faster clocking and fewer cycles per instruction, so thats a win. RISC also requires more instructions per useful operation and also blows up the binary size, so… :-(

    all things being equal (hahaha) RISC has more headroom and legroom for future improvements that dont complecate the silicon to extreme degrees. the vast majority of CISC designs are now pretty RISC-like at their cores, but the software interface remains CISC and, I think, complicates and limits variety and advancement.

    imho, a properly spec’d RISC processor and a carefully designed compiler, cycle for cycle, macro for macro and watt for watt outperforms a CISC design (even with a RISC-like core). major computing holy wars are been waged over this for decades.

    all I currently have access to are older studies that show mixed general purpose results on RISC vs CISC (performance, not power efficiency), but if I had to make a choice about what my future ideal processor would be, it would be RISC core and RISC instruction set architecture simply due to less complexity, more efficient use of wafer space and lower power requirements. then we start talking about massively parallel RISC in tiny spaces and, for many (but not all) workloads, thats a big win.





  • great reply. I am not saying RISC is the panecea, what I am saying is that there are more options for workload optimization further up the stack and rebalancing of the intelligence from the silicon to the software is an advantage.

    some time ago most CISC core design become more RISC-y and, to indulge in some ISA snobbery, I just want to slash and burn the CISC presentation to the software layer. memory is cheap, bus bandwidth is insane - simplification on the ISA just seems like a hardware complexity win all around and I am willing to pay for that in compiler complexity that incorporates changes more easily than hardware or CISC microcode.

    RISC-V’s challenge is can they standardise the software ecosystem enough[…]

    agreed. this is why I say my wait may be coming to an end.

    personally, I think RISC is the more flexible design in almost every usecase. cycle for cycle, RISC hits the right buttons for me across the widest number of situations once we get above the “magic hardware” layer. willing to flog the CISC vs RiSC horse convo if you have recent information, and thanks for the response.